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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/islped/HassanAE05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hassan_Hassan_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohab_Anis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohamed_I._Elmasry>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1077603.1077664>
foaf:homepage <https://doi.org/10.1145/1077603.1077664>
dc:identifier DBLP conf/islped/HassanAE05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1077603.1077664 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hassan_Hassan_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohab_Anis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohamed_I._Elmasry>
swrc:pages 257-262 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/islped/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/islped/HassanAE05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/islped/HassanAE05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/islped/islped2005.html#HassanAE05>
rdfs:seeAlso <https://doi.org/10.1145/1077603.1077664>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject FPGA, activity profile, basic logic elements (BLEs), configurable logic blocks (CLBs), packing, sleep transistor (ST), sub-threshold leakage power (xsd:string)
dc:title LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document