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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/islped/HsuW02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sying-Jyan_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Lung_Hsu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F566408.566480>
foaf:homepage <https://doi.org/10.1145/566408.566480>
dc:identifier DBLP conf/islped/HsuW02 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F566408.566480 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label Retiming-based logic synthesis for low-power. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sying-Jyan_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Lung_Hsu>
swrc:pages 275-278 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/islped/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/islped/HsuW02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/islped/HsuW02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/islped/islped2002.html#HsuW02>
rdfs:seeAlso <https://doi.org/10.1145/566408.566480>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject logic design, low-power, retiming, switching actvity (xsd:string)
dc:title Retiming-based logic synthesis for low-power. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document