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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/islped/HuBSZJB04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alper_Buyuktosunoglu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hans_M._Jacobson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pradip_Bose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Victor_V._Zyuban>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Viji_Srinivasan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhigang_Hu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1013235.1013249>
foaf:homepage <https://doi.org/10.1145/1013235.1013249>
dc:identifier DBLP conf/islped/HuBSZJB04 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1013235.1013249 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Microarchitectural techniques for power gating of execution units. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alper_Buyuktosunoglu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hans_M._Jacobson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pradip_Bose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Victor_V._Zyuban>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Viji_Srinivasan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhigang_Hu>
swrc:pages 32-37 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/islped/islped2004.html#HuBSZJB04>
rdfs:seeAlso <https://doi.org/10.1145/1013235.1013249>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject execution units, low power, microarchitecture, power-gating (xsd:string)
dc:title Microarchitectural techniques for power gating of execution units. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document