A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/KimPZSTYTTSRW03
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/islped/KimPZSTYTTSRW03
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Asit_Ray
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jean-Olivier_Plouchart
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/John_Safran
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jonghae_Kim
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Lawrence_F._Wagner
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Meeyoung_Yoon
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Melanie_Sherony
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mohamed_Talbi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Noah_Zamdmer
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Robert_Trzcinski
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yue_Tan
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F871506.871614
>
foaf:
homepage
<
https://doi.org/10.1145/871506.871614
>
dc:
identifier
DBLP conf/islped/KimPZSTYTTSRW03
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F871506.871614
(xsd:string)
dcterms:
issued
2003
(xsd:gYear)
rdfs:
label
A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Asit_Ray
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jean-Olivier_Plouchart
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/John_Safran
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jonghae_Kim
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Lawrence_F._Wagner
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Meeyoung_Yoon
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Melanie_Sherony
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mohamed_Talbi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Noah_Zamdmer
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Robert_Trzcinski
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yue_Tan
>
swrc:
pages
434-439
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/islped/2003
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/islped/KimPZSTYTTSRW03/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/islped/KimPZSTYTTSRW03
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/islped/islped2003.html#KimPZSTYTTSRW03
>
rdfs:
seeAlso
<
https://doi.org/10.1145/871506.871614
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/islped
>
dc:
subject
RF design, SOI CMOS, VCO, high resistivity substrate, low power, phase NoiseFOM
(xsd:string)
dc:
title
A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document