A methodology for analysis and verification of power gated circuits with correlated results.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/SarkarLW07
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/islped/SarkarLW07
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Aveek_Sarkar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shen_Lin
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1283780.1283856
>
foaf:
homepage
<
https://doi.org/10.1145/1283780.1283856
>
dc:
identifier
DBLP conf/islped/SarkarLW07
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1283780.1283856
(xsd:string)
dcterms:
issued
2007
(xsd:gYear)
rdfs:
label
A methodology for analysis and verification of power gated circuits with correlated results.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Aveek_Sarkar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shen_Lin
>
swrc:
pages
351-354
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/islped/2007
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/islped/SarkarLW07/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/islped/SarkarLW07
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/islped/islped2007.html#SarkarLW07
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1283780.1283856
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/islped
>
dc:
subject
MTCMOS, RedHawk, analysis, design, power gate, standby leakage current, verification
(xsd:string)
dc:
title
A methodology for analysis and verification of power gated circuits with correlated results.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document