Evaluating design tradeoffs in on-chip power management for CMPs. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Alper_Buyuktosunoglu>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Joseph_J._Sharkey>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Pradip_Bose>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F1283780.1283791>
foaf:homepage	<https://doi.org/10.1145/1283780.1283791>
dc:identifier	DBLP conf/islped/SharkeyBB07 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F1283780.1283791 (xsd:string)
dcterms:issued	2007 (xsd:gYear)
rdfs:label	Evaluating design tradeoffs in on-chip power management for CMPs. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Alper_Buyuktosunoglu>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Joseph_J._Sharkey>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Pradip_Bose>
swrc:pages	44-49 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/islped/2007>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/islped/SharkeyBB07/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/islped/SharkeyBB07>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/islped/islped2007.html#SharkeyBB07>
rdfs:seeAlso	<https://doi.org/10.1145/1283780.1283791>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject	chip multi-processor, dynamic voltage scaling, fetch throttling, power-aware (xsd:string)
dc:title	Evaluating design tradeoffs in on-chip power management for CMPs. (xsd:string)
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rdf:type	swrc:InProceedings
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