High resolution body bias techniques for reducing the impacts of leakage current and parasitic bipolar.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/Sumita05
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2005
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High resolution body bias techniques for reducing the impacts of leakage current and parasitic bipolar.
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CMOS scaling, band-to band tunneling, body bias generator, dead lock, leakage components, leakage current, process compensation, process variation, substrate bias
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High resolution body bias techniques for reducing the impacts of leakage current and parasitic bipolar.
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