Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/TschanzNCBSD01
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2001
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Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.
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clocking, dual edge, flip-flops, latches, low power, triggered
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Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.
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