A self-optimizing embedded microprocessor using a loop table for low power.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/VahidG01
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2001
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A self-optimizing embedded microprocessor using a loop table for low power.
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cores, embedded systems, low-power, parameterized architectures, platforms, self-optimizing architecture, system-on-a-chip, tuning
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A self-optimizing embedded microprocessor using a loop table for low power.
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