Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/ClarinoKY23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/David_Clarino
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shigeru_Yamashita
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shohei_Kuroda
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FISMVL57333.2023.00037
>
foaf:
homepage
<
https://doi.org/10.1109/ISMVL57333.2023.00037
>
dc:
identifier
DBLP conf/ismvl/ClarinoKY23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FISMVL57333.2023.00037
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
rdfs:
label
Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/David_Clarino
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shigeru_Yamashita
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shohei_Kuroda
>
swrc:
pages
147-152
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/2023
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/ismvl/ClarinoKY23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/ismvl/ClarinoKY23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/ismvl/ismvl2023.html#ClarinoKY23
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ISMVL57333.2023.00037
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/ismvl
>
dc:
title
Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document