Random Pattern Fault Simulation in Multi-Valued Circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/DrechslerKB95
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/DrechslerKB95
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rolf_Krieger
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FISMVL.1995.513516
>
foaf:
homepage
<
https://doi.org/10.1109/ISMVL.1995.513516
>
dc:
identifier
DBLP conf/ismvl/DrechslerKB95
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FISMVL.1995.513516
(xsd:string)
dcterms:
issued
1995
(xsd:gYear)
rdfs:
label
Random Pattern Fault Simulation in Multi-Valued Circuits.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rolf_Krieger
>
swrc:
pages
98-103
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/1995
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/ismvl/DrechslerKB95/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/ismvl/DrechslerKB95
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/ismvl/ismvl1995.html#DrechslerKB95
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ISMVL.1995.513516
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/ismvl
>
dc:
subject
multivalued logic circuits; fault diagnosis; logic testing; circuit analysis computing; integrated circuit testing; random pattern fault simulation; multi-valued circuits; fault simulator; random pattern testability; multi-valued logic networks
(xsd:string)
dc:
title
Random Pattern Fault Simulation in Multi-Valued Circuits.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document