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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/DrechslerKB97a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Martin_Keim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISMVL.1997.601389>
foaf:homepage <https://doi.org/10.1109/ISMVL.1997.601389>
dc:identifier DBLP conf/ismvl/DrechslerKB97a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISMVL.1997.601389 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Fault Simulation in Sequential Multi-Valued Logic Networks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Martin_Keim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler>
swrc:pages 145-152 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ismvl/DrechslerKB97a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ismvl/DrechslerKB97a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ismvl/ismvl1997.html#DrechslerKB97a>
rdfs:seeAlso <https://doi.org/10.1109/ISMVL.1997.601389>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ismvl>
dc:subject logic testing; sequential multi-valued logic networks; random pattern testability; fault models; sequential circuits; multi-valued logic networks; fault simulator (xsd:string)
dc:title Fault Simulation in Sequential Multi-Valued Logic Networks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document