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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/FadamiroRMH21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ayokunle_Fadamiro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christoper_B._Harris>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pouyan_Rezaie>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Spencer_K._Millican>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISMVL51352.2021.00036>
foaf:homepage <https://doi.org/10.1109/ISMVL51352.2021.00036>
dc:identifier DBLP conf/ismvl/FadamiroRMH21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISMVL51352.2021.00036 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ayokunle_Fadamiro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Christoper_B._Harris>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pouyan_Rezaie>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Spencer_K._Millican>
swrc:pages 166-171 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ismvl/FadamiroRMH21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ismvl/FadamiroRMH21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ismvl/ismvl2021.html#FadamiroRMH21>
rdfs:seeAlso <https://doi.org/10.1109/ISMVL51352.2021.00036>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ismvl>
dc:title A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document