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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/HanyuTK98>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaname_Teranishi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michitaka_Kameyama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Hanyu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISMVL.1998.679469>
foaf:homepage <https://doi.org/10.1109/ISMVL.1998.679469>
dc:identifier DBLP conf/ismvl/HanyuTK98 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISMVL.1998.679469 (xsd:string)
dcterms:issued 1998 (xsd:gYear)
rdfs:label Multiple-Valued Floating-Gate-MOS Pass Logic and its Application to Logic-in-Memory VLSI. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaname_Teranishi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michitaka_Kameyama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Hanyu>
swrc:pages 270-275 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/1998>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ismvl/HanyuTK98/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ismvl/HanyuTK98>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ismvl/ismvl1998.html#HanyuTK98>
rdfs:seeAlso <https://doi.org/10.1109/ISMVL.1998.679469>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ismvl>
dc:title Multiple-Valued Floating-Gate-MOS Pass Logic and its Application to Logic-in-Memory VLSI. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document