On Input Permutation Technique for Multiple-Valued Logic Synthesis.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/HataKY95
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1995
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On Input Permutation Technique for Multiple-Valued Logic Synthesis.
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multivalued logic; logic design; set theory; input permutation technique; multiple-valued logic synthesis; multiple valued sum of products expressions; TSUM; minimal sum of products expressions; permuted logic values; randomly generated functions; input permutation; output permutation; minimization times; window literals; sum of products expressions; set literals
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On Input Permutation Technique for Multiple-Valued Logic Synthesis.
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