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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ismvl/KoPYJKS21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/JongHyun_Ko>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/KwanWoo_Park>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suhyeong_Yong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/TaeGam_Jeong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Taehak_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Taigon_Song>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISMVL51352.2021.00040>
foaf:homepage <https://doi.org/10.1109/ISMVL51352.2021.00040>
dc:identifier DBLP conf/ismvl/KoPYJKS21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISMVL51352.2021.00040 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/JongHyun_Ko>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/KwanWoo_Park>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suhyeong_Yong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/TaeGam_Jeong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Taehak_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Taigon_Song>
swrc:pages 189-194 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ismvl/2021>
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rdfs:seeAlso <https://doi.org/10.1109/ISMVL51352.2021.00040>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ismvl>
dc:title An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document