Maximizing Power Saving Through State-Driven Clock Gating. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chaehyun_Kim>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Taewhan_Kim>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FISOCC59558.2023.10396230>
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dc:identifier	DBLP conf/isocc/KimK23a (xsd:string)
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dcterms:issued	2023 (xsd:gYear)
rdfs:label	Maximizing Power Saving Through State-Driven Clock Gating. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Chaehyun_Kim>
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swrc:pages	123-124 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/isocc/2023>
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rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/isocc/isocc2023.html#KimK23a>
rdfs:seeAlso	<https://doi.org/10.1109/ISOCC59558.2023.10396230>
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dc:title	Maximizing Power Saving Through State-Driven Clock Gating. (xsd:string)
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rdf:type	swrc:InProceedings
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