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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isocc/YoonKSPKPKK23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Boogyo_Sim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hyunwoo_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hyunwook_Park>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiwon_Yoon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joungho_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sujin_Park>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yi-Gyeong_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Youngsu_Kwon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISOCC59558.2023.10396127>
foaf:homepage <https://doi.org/10.1109/ISOCC59558.2023.10396127>
dc:identifier DBLP conf/isocc/YoonKSPKPKK23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISOCC59558.2023.10396127 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Multi-Stripline Redistribution Layer Interposer Channel Design for High Bandwidth Memory Module Considering Via Interconnect. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Boogyo_Sim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hyunwoo_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hyunwook_Park>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiwon_Yoon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joungho_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sujin_Park>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yi-Gyeong_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Youngsu_Kwon>
swrc:pages 247-248 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isocc/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isocc/YoonKSPKPKK23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isocc/YoonKSPKPKK23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isocc/isocc2023.html#YoonKSPKPKK23>
rdfs:seeAlso <https://doi.org/10.1109/ISOCC59558.2023.10396127>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isocc>
dc:title Multi-Stripline Redistribution Layer Interposer Channel Design for High Bandwidth Memory Module Considering Via Interconnect. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document