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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispa/ChenGC04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chih-Hung_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ching-Wen_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Phui-Si_Gan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30566-8%5F114>
foaf:homepage <https://doi.org/10.1007/978-3-540-30566-8_114>
dc:identifier DBLP conf/ispa/ChenGC04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30566-8%5F114 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Designing a High Performance and Fault Tolerant Multistage Interconnection Network with Easy Dynamic Rerouting. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chih-Hung_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ching-Wen_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Phui-Si_Gan>
swrc:pages 1007-1016 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispa/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispa/ChenGC04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispa/ChenGC04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispa/ispa2004.html#ChenGC04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30566-8_114>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispa>
dc:subject Parallel computing, multistage interconnection network(MIN), fault tolerance, collision, performance, destination tag routing. (xsd:string)
dc:title Designing a High Performance and Fault Tolerant Multistage Interconnection Network with Easy Dynamic Rerouting. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document