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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispa/ItoN09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakano>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasuaki_Ito>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISPA.2009.35>
foaf:homepage <https://doi.org/10.1109/ISPA.2009.35>
dc:identifier DBLP conf/ispa/ItoN09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISPA.2009.35 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakano>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasuaki_Ito>
swrc:pages 63-70 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispa/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispa/ItoN09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispa/ItoN09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispa/ispa2009.html#ItoN09>
rdfs:seeAlso <https://doi.org/10.1109/ISPA.2009.35>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispa>
dc:subject Hardware Algorithm, FPGA Implementation, block RAMs (xsd:string)
dc:title A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document