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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispan/XuH96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kai_Hwang_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhiwei_Xu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISPAN.1996.508970>
foaf:homepage <https://doi.org/10.1109/ISPAN.1996.508970>
dc:identifier DBLP conf/ispan/XuH96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISPAN.1996.508970 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label MPPs and clusters for scalable computing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kai_Hwang_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhiwei_Xu>
swrc:pages 117-123 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispan/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispan/XuH96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispan/XuH96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispan/ispan1996.html#XuH96>
rdfs:seeAlso <https://doi.org/10.1109/ISPAN.1996.508970>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispan>
dc:subject reconfigurable architectures; parallel architectures; performance evaluation; scalable computing; massively parallel processors; MPPs; clusters of workstations; scalable parallel computing; IBM SP2; Intel Paragon; Cray T3D/T3E; ASCI TeraFLOPS; Intel; scalability; performance attributes (xsd:string)
dc:title MPPs and clusters for scalable computing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document