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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispcs/RinaldiBFFPS19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandra_Flammini>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Emiliano_Sisinni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Federico_Bonafini>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marco_Pasetti>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paolo_Ferrari>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefano_Rinaldi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISPCS.2019.8886644>
foaf:homepage <https://doi.org/10.1109/ISPCS.2019.8886644>
dc:identifier DBLP conf/ispcs/RinaldiBFFPS19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISPCS.2019.8886644 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Software-based Time Synchronization for Integrating Power Hardware in the Loop Emulation in IEEE1588 Power Profile Testbed. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandra_Flammini>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Emiliano_Sisinni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Federico_Bonafini>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marco_Pasetti>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paolo_Ferrari>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefano_Rinaldi>
swrc:pages 1-6 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ISPCS.2019.8886644>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispcs>
dc:title Software-based Time Synchronization for Integrating Power Hardware in the Loop Emulation in IEEE1588 Power Profile Testbed. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document