Crosstalk noise optimization by post-layout transistor sizing. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/ispd/HashimotoTO02>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Hidetoshi_Onodera>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Masanori_Hashimoto>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Masao_Takahashi>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F505388.505420>
foaf:homepage	<https://doi.org/10.1145/505388.505420>
dc:identifier	DBLP conf/ispd/HashimotoTO02 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F505388.505420 (xsd:string)
dcterms:issued	2002 (xsd:gYear)
rdfs:label	Crosstalk noise optimization by post-layout transistor sizing. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Hidetoshi_Onodera>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Masanori_Hashimoto>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Masao_Takahashi>
swrc:pages	126-130 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/ispd/2002>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/ispd/HashimotoTO02/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/ispd/HashimotoTO02>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/ispd/ispd2002.html#HashimotoTO02>
rdfs:seeAlso	<https://doi.org/10.1145/505388.505420>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:subject	capacitive coupling noise, crosstalk noise, gate sizing, post-layout optimization, transistor sizing (xsd:string)
dc:title	Crosstalk noise optimization by post-layout transistor sizing. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document