Industrial clock design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ispd/Ho09
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/ispd/Ho09
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pei-Hsin_Ho
>
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homepage
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http://dx.doi.org/doi.org%2F10.1145%2F1514932.1514963
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DBLP conf/ispd/Ho09
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dcterms:
issued
2009
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rdfs:
label
Industrial clock design.
(xsd:string)
foaf:
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https://dblp.l3s.de/d2r/resource/authors/Pei-Hsin_Ho
>
swrc:
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139-140
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rdfs:
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swrc:
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https://dblp.l3s.de/d2r/resource/conferences/ispd
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dc:
subject
clock tree synthesis, low power, physical design, variability
(xsd:string)
dc:
title
Industrial clock design.
(xsd:string)
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