[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispd/PevznerKF09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_A._Kennings>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andy_Fox>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Val_Pevzner>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1514932.1514955>
foaf:homepage <https://doi.org/10.1145/1514932.1514955>
dc:identifier DBLP conf/ispd/PevznerKF09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1514932.1514955 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Physical optimization for FPGAs using post-placement topology rewriting. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_A._Kennings>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andy_Fox>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Val_Pevzner>
swrc:pages 91-98 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispd/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispd/PevznerKF09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispd/PevznerKF09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispd/ispd2009.html#PevznerKF09>
rdfs:seeAlso <https://doi.org/10.1145/1514932.1514955>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:subject fpga, physical synthesis, timing optimization (xsd:string)
dc:title Physical optimization for FPGAs using post-placement topology rewriting. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document