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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispd/RajarathnamJIP23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Z._Pan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahesh_A._Iyer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rachel_Selina_Rajarathnam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zixuan_Jiang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3569052.3571881>
foaf:homepage <https://doi.org/10.1145/3569052.3571881>
dc:identifier DBLP conf/ispd/RajarathnamJIP23 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3569052.3571881 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Z._Pan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahesh_A._Iyer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rachel_Selina_Rajarathnam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zixuan_Jiang>
swrc:pages 175-184 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispd/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispd/RajarathnamJIP23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispd/RajarathnamJIP23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispd/ispd2023.html#RajarathnamJIP23>
rdfs:seeAlso <https://doi.org/10.1145/3569052.3571881>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:title DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document