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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispd/Remond06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_R%E2%88%9A%C2%A9mond>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1123008.1123041>
foaf:homepage <https://doi.org/10.1145/1123008.1123041>
dc:identifier DBLP conf/ispd/Remond06 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1123008.1123041 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Physical design challenges for multi-million gate SoC's: an STMicroelectronics perspective. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_R%E2%88%9A%C2%A9mond>
swrc:pages 166 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispd/ispd2006.html#Remond06>
rdfs:seeAlso <https://doi.org/10.1145/1123008.1123041>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:title Physical design challenges for multi-million gate SoC's: an STMicroelectronics perspective. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document