[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispd/ShenCHH08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiang_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weixiang_Shen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1353629.1353668>
foaf:homepage <https://doi.org/10.1145/1353629.1353668>
dc:identifier DBLP conf/ispd/ShenCHH08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1353629.1353668 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Activity and register placement aware gated clock network design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiang_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weixiang_Shen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
swrc:pages 182-189 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispd/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispd/ShenCHH08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispd/ShenCHH08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispd/ispd2008.html#ShenCHH08>
rdfs:seeAlso <https://doi.org/10.1145/1353629.1353668>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:subject gated clock tree, low power, placement (xsd:string)
dc:title Activity and register placement aware gated clock network design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document