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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ispd/TsengC08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bruce_Tseng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hung-Ming_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1353629.1353636>
foaf:homepage <https://doi.org/10.1145/1353629.1353636>
dc:identifier DBLP conf/ispd/TsengC08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1353629.1353636 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Blockage and voltage island-aware dual-vdd buffered tree construction under fixed buffer locations. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bruce_Tseng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hung-Ming_Chen>
swrc:pages 23-30 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ispd/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ispd/TsengC08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ispd/TsengC08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ispd/ispd2008.html#TsengC08>
rdfs:seeAlso <https://doi.org/10.1145/1353629.1353636>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ispd>
dc:subject buffer insertion, low power, voltage island architecture (xsd:string)
dc:title Blockage and voltage island-aware dual-vdd buffered tree construction under fixed buffer locations. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document