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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isqed/AlamTT02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carl_V._Thompson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Donald_E._Troxel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Syed_M._Alam>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISQED.2002.996742>
foaf:homepage <https://doi.org/10.1109/ISQED.2002.996742>
dc:identifier DBLP conf/isqed/AlamTT02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISQED.2002.996742 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carl_V._Thompson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Donald_E._Troxel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Syed_M._Alam>
swrc:pages 246-251 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isqed/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isqed/AlamTT02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isqed/AlamTT02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isqed/isqed2002.html#AlamTT02>
rdfs:seeAlso <https://doi.org/10.1109/ISQED.2002.996742>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isqed>
dc:subject 3D integrated circuit, 3D IC layout, inter-wafer via, performance analysis, FPGA, reliability analysis, reliability CAD tool (xsd:string)
dc:title A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document