[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isqed/ChanZ05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Henry_H._Y._Chan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zeljko_Zilic>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISQED.2005.80>
foaf:homepage <https://doi.org/10.1109/ISQED.2005.80>
dc:identifier DBLP conf/isqed/ChanZ05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISQED.2005.80 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Modeling Layout Effects for Sensitivity-Based Analog Circuit Optimization. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Henry_H._Y._Chan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zeljko_Zilic>
swrc:pages 390-395 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isqed/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isqed/ChanZ05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isqed/ChanZ05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isqed/isqed2005.html#ChanZ05>
rdfs:seeAlso <https://doi.org/10.1109/ISQED.2005.80>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isqed>
dc:subject Analog circuit optimization, parasitic extraction, sensitivity analysis, adjoint analysis (xsd:string)
dc:title Modeling Layout Effects for Sensitivity-Based Analog Circuit Optimization. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document