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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isqed/LeeLCW21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chia-Chun_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chun-Yao_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hsin-Tsung_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yung-Chih_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISQED51717.2021.9424249>
foaf:homepage <https://doi.org/10.1109/ISQED51717.2021.9424249>
dc:identifier DBLP conf/isqed/LeeLCW21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISQED51717.2021.9424249 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chia-Chun_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chun-Yao_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hsin-Tsung_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yung-Chih_Chen>
swrc:pages 316 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isqed/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isqed/LeeLCW21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isqed/LeeLCW21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isqed/isqed2021.html#LeeLCW21>
rdfs:seeAlso <https://doi.org/10.1109/ISQED51717.2021.9424249>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isqed>
dc:title On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document