A Reconfigurable Low-Power High-Performance Matrix Multiplier Design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isqed/Lin00
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2000
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A Reconfigurable Low-Power High-Performance Matrix Multiplier Design.
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Matrix multiplication, reconfigurable architecture, low-power CMOS circuits, parallel counter-multiplier circuits
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A Reconfigurable Low-Power High-Performance Matrix Multiplier Design.
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