A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isscc/HaKBPCJK09
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A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces.
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A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces.
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