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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isscc/HeY24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaiyuan_Yang_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yan_He_0002>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSCC49657.2024.10454280>
foaf:homepage <https://doi.org/10.1109/ISSCC49657.2024.10454280>
dc:identifier DBLP conf/isscc/HeY24 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSCC49657.2024.10454280 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
rdfs:label 16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaiyuan_Yang_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yan_He_0002>
swrc:pages 304-306 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isscc/2024>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isscc/HeY24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isscc/HeY24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#HeY24>
rdfs:seeAlso <https://doi.org/10.1109/ISSCC49657.2024.10454280>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isscc>
dc:title 16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document