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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isscc/KarSMRDM17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anand_Rajan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arvind_Singh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Monodeep_Kar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sanu_Mathew>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSCC.2017.7870301>
foaf:homepage <https://doi.org/10.1109/ISSCC.2017.7870301>
dc:identifier DBLP conf/isscc/KarSMRDM17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSCC.2017.7870301 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label 8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anand_Rajan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arvind_Singh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Monodeep_Kar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sanu_Mathew>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
swrc:pages 142-143 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isscc/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isscc/KarSMRDM17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isscc/KarSMRDM17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isscc/isscc2017.html#KarSMRDM17>
rdfs:seeAlso <https://doi.org/10.1109/ISSCC.2017.7870301>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isscc>
dc:title 8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document