An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isscc/KimKCPKJPLKSPKC06
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An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme.
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