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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isscc/KonstadinidisRLOOPSGPREGP08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Georgios_K._Konstadinidis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ilyas_Elkin>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yannis_Orginos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuefei_Ge>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukio_Otaguro>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSCC.2008.4523068>
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dc:identifier DBLP conf/isscc/KonstadinidisRLOOPSGPREGP08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSCC.2008.4523068 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs¬ģ Processor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Georgios_K._Konstadinidis>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leonard_Rarick>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mamun_Rashid>
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swrc:pages 84-85 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ISSCC.2008.4523068>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isscc>
dc:title Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs¬ģ Processor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document