A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and √ó4 half-page architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12
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A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and √ó4 half-page architecture.
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A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and √ó4 half-page architecture.
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