An adaptive-bandwidth PLL for avoiding noise interference and DFE-less fast precharge sampling for over 10Gb/s/pin graphics DRAM interface. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chulwoo_Kim>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Hyun-Woo_Lee>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Junyoung_Song>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Sewook_Hwang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Soo-Bin_Lim>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Young-Jung_Choi>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yunsaing_Kim>
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rdfs:label	An adaptive-bandwidth PLL for avoiding noise interference and DFE-less fast precharge sampling for over 10Gb/s/pin graphics DRAM interface. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Byong-Tae_Chung>
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Hyun-Woo_Lee>
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Young-Jung_Choi>
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dc:title	An adaptive-bandwidth PLL for avoiding noise interference and DFE-less fast precharge sampling for over 10Gb/s/pin graphics DRAM interface. (xsd:string)
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