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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isscc/TeradaONKKY09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroaki_Katsurai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Terada>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuyoshi_Nishimura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naoto_Yoshimoto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shunji_Kimura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yusuke_Ohtomo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSCC.2009.4977329>
foaf:homepage <https://doi.org/10.1109/ISSCC.2009.4977329>
dc:identifier DBLP conf/isscc/TeradaONKKY09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSCC.2009.4977329 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Jitter-reduction and pulse-width-distortion compensation circuits for a 10Gb/s burst-mode CDR circuit. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroaki_Katsurai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Terada>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuyoshi_Nishimura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naoto_Yoshimoto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shunji_Kimura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yusuke_Ohtomo>
swrc:pages 104-105 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isscc/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isscc/TeradaONKKY09/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isscc/isscc2009.html#TeradaONKKY09>
rdfs:seeAlso <https://doi.org/10.1109/ISSCC.2009.4977329>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isscc>
dc:title Jitter-reduction and pulse-width-distortion compensation circuits for a 10Gb/s burst-mode CDR circuit. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document