A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isscc/ThomsonRJ06
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/isscc/ThomsonRJ06
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Michael_G._R._Thomson
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Norman_K._James
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Phillip_J._Restle
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FISSCC.2006.1696203
>
foaf:
homepage
<
https://doi.org/10.1109/ISSCC.2006.1696203
>
dc:
identifier
DBLP conf/isscc/ThomsonRJ06
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FISSCC.2006.1696203
(xsd:string)
dcterms:
issued
2006
(xsd:gYear)
rdfs:
label
A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Michael_G._R._Thomson
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Norman_K._James
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Phillip_J._Restle
>
swrc:
pages
1522-1529
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/isscc/2006
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/isscc/ThomsonRJ06/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/isscc/ThomsonRJ06
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/isscc/isscc2006.html#ThomsonRJ06
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ISSCC.2006.1696203
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/isscc
>
dc:
title
A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document