[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isscc/YinglingPVPJCHVCKSB24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anil_Kumar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Yingling>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dipti_Pal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Felipe_G._Cabral>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jason_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keith_A._Bowman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajan_Verma>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Vachon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sagar_Jariwala>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Santanu_Sarma>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vamshidhar_Chiranji>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yimai_Peng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSCC49657.2024.10454421>
foaf:homepage <https://doi.org/10.1109/ISSCC49657.2024.10454421>
dc:identifier DBLP conf/isscc/YinglingPVPJCHVCKSB24 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSCC49657.2024.10454421 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
rdfs:label 14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anil_Kumar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Yingling>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dipti_Pal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Felipe_G._Cabral>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jason_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keith_A._Bowman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajan_Verma>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Vachon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sagar_Jariwala>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Santanu_Sarma>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vamshidhar_Chiranji>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yimai_Peng>
swrc:pages 258-260 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isscc/2024>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isscc/YinglingPVPJCHVCKSB24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isscc/YinglingPVPJCHVCKSB24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#YinglingPVPJCHVCKSB24>
rdfs:seeAlso <https://doi.org/10.1109/ISSCC49657.2024.10454421>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isscc>
dc:title 14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document