RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FSOCC.2009.5335665>
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swrc:pages	110-113 (xsd:string)
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dc:title	RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip. (xsd:string)
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