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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/issoc/CoenenSWN10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jochen_Schleifer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oliver_Wei%E2%88%9A%C3%BC>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_Coenen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tobias_G._Noll>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSOC.2010.5625549>
foaf:homepage <https://doi.org/10.1109/ISSOC.2010.5625549>
dc:identifier DBLP conf/issoc/CoenenSWN10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSOC.2010.5625549 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Interconnect routing of embedded FPGAs using standard VLSI routing tools. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jochen_Schleifer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oliver_Wei%E2%88%9A%C3%BC>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_Coenen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tobias_G._Noll>
swrc:pages 121-124 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/issoc/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/issoc/CoenenSWN10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/issoc/CoenenSWN10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/issoc/issoc2010.html#CoenenSWN10>
rdfs:seeAlso <https://doi.org/10.1109/ISSOC.2010.5625549>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/issoc>
dc:title Interconnect routing of embedded FPGAs using standard VLSI routing tools. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document