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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isss/BalboniFVS96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Balboni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Donatella_Sciuto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Massimo_Vincenzi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/William_Fornaciari>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSS.1996.565883>
foaf:homepage <https://doi.org/10.1109/ISSS.1996.565883>
dc:identifier DBLP conf/isss/BalboniFVS96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSS.1996.565883 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Balboni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Donatella_Sciuto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Massimo_Vincenzi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/William_Fornaciari>
swrc:pages 77-82 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isss/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isss/BalboniFVS96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isss/BalboniFVS96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isss/isss1996.html#BalboniFVS96>
rdfs:seeAlso <https://doi.org/10.1109/ISSS.1996.565883>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isss>
dc:subject real-time systems; virtual instruction set; software synthesis; embedded systems; embedded computing; software development; control-dominated hardware-software system; real-time constraints; system synthesis; performance estimation; static scheduling; retargetable code synthesis (xsd:string)
dc:title The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document