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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isss/DerrienRS01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sanjay_V._Rajopadhye>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_Derrien>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Susmita_Sur-Kolay>
foaf:homepage <http://dx.doi.org/doi.ieeecomputersociety.org%2F10.1109%2FISSS.2001.957933>
foaf:homepage <https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957933>
dc:identifier DBLP conf/isss/DerrienRS01 (xsd:string)
dc:identifier DOI doi.ieeecomputersociety.org%2F10.1109%2FISSS.2001.957933 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label Combined instruction and loop parallelism in array synthesis for FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sanjay_V._Rajopadhye>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_Derrien>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Susmita_Sur-Kolay>
swrc:pages 165-170 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isss/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isss/DerrienRS01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isss/DerrienRS01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isss/isss2001.html#DerrienRS01>
rdfs:seeAlso <https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957933>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isss>
dc:title Combined instruction and loop parallelism in array synthesis for FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document