An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isss/MunchGW96
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An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions.
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scheduling, control-flow dominated VHDL, ILP, time-constrainted scheduling, resource-constrained scheduling, code transformation
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An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions.
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