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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isss/NakataMSKZ02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akio_Matsuda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Minoru_Shoji>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiang_Zhu_0005>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shinya_Kuwamura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsuneo_Nakata>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSS.2002.1227186>
foaf:homepage <https://doi.org/10.1109/ISSS.2002.1227186>
dc:identifier DBLP conf/isss/NakataMSKZ02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSS.2002.1227186 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label An Object-Oriented Design Process for System-on-Chip Using UML. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akio_Matsuda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Minoru_Shoji>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiang_Zhu_0005>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shinya_Kuwamura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsuneo_Nakata>
swrc:pages 249-254 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isss/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isss/NakataMSKZ02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isss/NakataMSKZ02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isss/isss2002.html#NakataMSKZ02>
rdfs:seeAlso <https://doi.org/10.1109/ISSS.2002.1227186>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isss>
dc:subject UML, design process, object-oriented analysis and design, system level design, system level performance evaluation (xsd:string)
dc:title An Object-Oriented Design Process for System-on-Chip Using UML. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document