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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isss/SalaB02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carles_Rodoreda_Sala>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Natalino_G._Bus%E2%88%9A%C2%B0>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSS.2002.1227150>
foaf:homepage <https://doi.org/10.1109/ISSS.2002.1227150>
dc:identifier DBLP conf/isss/SalaB02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSS.2002.1227150 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carles_Rodoreda_Sala>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Natalino_G._Bus%E2%88%9A%C2%B0>
swrc:pages 44-49 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isss/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isss/SalaB02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isss/SalaB02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isss/isss2002.html#SalaB02>
rdfs:seeAlso <https://doi.org/10.1109/ISSS.2002.1227150>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isss>
dc:subject VLIW processors, architectural synthesis, reconfigurable logic (xsd:string)
dc:title A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document